Semiconductor device

ABSTRACT

According to one embodiment, a semiconductor device includes a silicon carbide member, first, second, and third electrodes, and a first insulating member. The silicon carbide member includes first, second, and third silicon carbide regions. The first silicon carbide region includes first, second, third, and fourth partial regions. The third partial region is between the first and second partial regions. The fourth partial region is between the third partial region and the first electrode. The second silicon carbide region includes first and second semiconductor regions. The third silicon carbide region includes third and fourth semiconductor regions. The first insulating member includes first, second, and third insulating regions. The second electrode is electrically connected to the first silicon carbide region. The third and fourth partial regions are between the second and first electrodes. The third electrode is electrically connected to the second silicon carbide region.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is based upon and claims the benefit of priority fromJapanese Patent Application No. 2020-088784, filed on May 21, 2020; theentire contents of which are incorporated herein by reference.

FIELD

Embodiments generally relate to a semiconductor device.

BACKGROUND

It is desirable to improve the characteristics of a semiconductordevice.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic cross-sectional view illustrating a semiconductordevice according to an embodiment; and

FIG. 2 is a schematic cross-sectional view illustrating thesemiconductor device according to the embodiment.

DETAILED DESCRIPTION

According to one embodiment, a semiconductor device includes a siliconcarbide member, a first electrode, a second electrode, a thirdelectrode, and a first insulating member. The silicon carbide memberincludes a first silicon carbide region, a second silicon carbideregion, and a third silicon carbide region. The first silicon carbideregion includes a first partial region, a second partial region, a thirdpartial region, and a fourth partial region. The first silicon carbideregion is of a first conductivity type. A direction from the firstpartial region toward the second partial region is along a firstdirection. The third partial region is between the first partial regionand the second partial region. The fourth partial region is between thethird partial region and the first electrode in a second directioncrossing the first direction. The second silicon carbide region includesa first semiconductor region and a second semiconductor region. Thesecond silicon carbide region is of the first conductivity type. Adirection from the first partial region toward the first semiconductorregion and a direction from the second partial region toward the secondsemiconductor region are along the second direction. The third siliconcarbide region includes a third semiconductor region and a fourthsemiconductor region. The third silicon carbide region is of a secondconductivity type. The third semiconductor region is between the firstpartial region and the first semiconductor region in the seconddirection. The fourth semiconductor region is between the second partialregion and the second semiconductor region in the second direction. Thefourth partial region is between the third semiconductor region and thefourth semiconductor region in the first direction. At least a portionof the first electrode is between the first semiconductor region and thesecond semiconductor region in the first direction and between the thirdsemiconductor region and the fourth semiconductor region in the firstdirection. The first insulating member includes a first insulatingregion, a second insulating region, and a third insulating region. Thefirst insulating region is between the first semiconductor region andthe first electrode and between the third semiconductor region and thefirst electrode. The second insulating region is between the firstelectrode and the second semiconductor region and between the firstelectrode and the fourth semiconductor region. The third insulatingregion is between the fourth partial region and the first electrode. Thesecond electrode is electrically connected to the first silicon carbideregion. The third partial region and the fourth partial region arebetween the second electrode and the first electrode. The thirdelectrode is electrically connected to the second silicon carbideregion. The first insulating region includes a first surface facing thefirst and third semiconductor regions. The first surface is oblique to a(0001) plane of the silicon carbide member. The first direction is alongthe (0001) plane.

Various embodiments are described below with reference to theaccompanying drawings.

The drawings are schematic and conceptual; and the relationships betweenthe thickness and width of portions, the proportions of sizes amongportions, etc., are not necessarily the same as the actual values. Thedimensions and proportions may be illustrated differently amongdrawings, even for identical portions.

In the specification and drawings, components similar to those describedpreviously in an antecedent drawing are marked with like referencenumerals, and a detailed description is omitted as appropriate.

Embodiment

FIG. 1 is a schematic cross-sectional view illustrating a semiconductordevice according to an embodiment.

As shown in FIG. 1, the semiconductor device 110 according to theembodiment includes a silicon carbide member 10, a first electrode 51, asecond electrode 52, a third electrode 53, and a first insulating member41.

The silicon carbide member 10 includes a first silicon carbide region11, a second silicon carbide region 12, and a third silicon carbideregion 13.

The first silicon carbide region 11 includes a first partial region 11a, a second partial region 11 b, a third partial region 11 c, and afourth partial region 11 d. The first silicon carbide region 11 is of afirst conductivity type. The direction from the first partial region 11a toward the second partial region 11 b is along a first direction.

The first direction is taken as an X-axis direction. One directionperpendicular to the X-axis direction is taken as a Z-axis direction. Adirection perpendicular to the X-axis direction and the Z-axis directionis taken as a Y-axis direction.

The third partial region 11 c is between the first partial region 11 aand the second partial region 11 b. The fourth partial region 11 d isbetween the third partial region 11 c and the first electrode 51 in asecond direction. The second direction crosses the first direction (theX-axis direction). The second direction is, for example, the Z-axisdirection. The boundaries between the first partial region 11 a, thesecond partial region 11 b, the third partial region 11 c, and thefourth partial region 11 d may be distinct or indistinct.

The second silicon carbide region 12 includes a first semiconductorregion 12 a and a second semiconductor region 12 b. The second siliconcarbide region 12 is of the first conductivity type. The direction fromthe first partial region 11 a toward the first semiconductor region 12 aand the direction from the second partial region 11 b toward the secondsemiconductor region 12 b are along the second direction (e.g., theZ-axis direction). The first semiconductor region 12 a and the secondsemiconductor region 12 b may be continuous at a different position fromthe cross section shown in FIG. 1.

The third silicon carbide region 13 includes a third semiconductorregion 13 c and a fourth semiconductor region 13 d. The third siliconcarbide region 13 is of a second conductivity type.

In one example, the first conductivity type is an n-type, and the secondconductivity type is a p-type. In another example, the firstconductivity type is the p-type, and the second conductivity type is then-type. Hereinbelow, the first conductivity type is taken to be then-type, and the second conductivity type is taken to be the p-type.

The first silicon carbide region 11 of the first conductivity type andthe second silicon carbide region 12 of the first conductivity typeinclude, for example, at least one selected from the group consisting ofN, P, and As as an n-type impurity. The third silicon carbide region 13of the second conductivity type includes, for example, at least oneselected from the group consisting of B, Al, and Ga as a p-typeimpurity.

For example, the first silicon carbide region 11 includes N. The secondsilicon carbide region 12 includes P. The third silicon carbide region13 includes Al.

The third semiconductor region 13 c is between the first partial region11 a and the first semiconductor region 12 a in the second direction(e.g., the Z-axis direction). The fourth semiconductor region 13 d isbetween the second partial region 11 b and the second semiconductorregion 12 b in the second direction (e.g., the Z-axis direction). Thefourth partial region 11 d is between the third semiconductor region 13c and the fourth semiconductor region 13 d in the first direction (theX-axis direction). The third semiconductor region 13 c and the fourthsemiconductor region 13 d may be continuous at a different position fromthe cross section shown in FIG. 1.

At least a portion of the first electrode 51 is between the firstsemiconductor region 12 a and the second semiconductor region 12 b inthe first direction (the X-axis direction) and between the thirdsemiconductor region 13 c and the fourth semiconductor region 13 d inthe first direction (the X-axis direction).

The first insulating member 41 includes a first insulating region 41 a,a second insulating region 41 b, and a third insulating region 41 c. Thefirst insulating region 41 a is between the first semiconductor region12 a and the first electrode 51 and between the third semiconductorregion 13 c and the first electrode 51. The second insulating region 41b is between the first electrode 51 and the second semiconductor region12 b and between the first electrode 51 and the fourth semiconductorregion 13 d. The third insulating region 41 c is between the fourthpartial region 11 d and the first electrode 51. The first insulatingmember 41 electrically insulates the silicon carbide member 10 and thefirst electrode 51.

The second electrode 52 is electrically connected to the first siliconcarbide region 11. In the example, the third partial region 11 c and thefourth partial region 11 d are between the second electrode 52 and thefirst electrode 51 in the Z-axis direction. The third insulating region41 c is between the second electrode 52 and the first electrode 51 inthe Z-axis direction.

The third electrode 53 is electrically connected to the second siliconcarbide region 12. For example, a portion 53 a of the third electrode 53is electrically connected to the first semiconductor region 12 a. Forexample, a portion 53 b of the third electrode 53 is electricallyconnected to the second semiconductor region 12 b. In the example, acontact region 53 p is provided between the first semiconductor region12 a and the portion 53 a described above. In the example, a contactregion 53 q is provided between the second semiconductor region 12 b andthe portion 53 b described above. The contact region 53 p and thecontact region 53 q include, for example, a silicide.

The first electrode 51 is, for example, a gate electrode. The secondelectrode 52 is, for example, a drain electrode. The third electrode 53is, for example, a source electrode. A current that flows between thesecond electrode 52 and the third electrode 53 can be controlled bycontrolling the potential of the first electrode 51. The semiconductordevice 110 is, for example, a transistor.

In the example as shown in FIG. 1, the silicon carbide member 10 furtherincludes a fourth silicon carbide region 14. The fourth silicon carbideregion 14 is of the second conductivity type (e.g., the p-type). Thefourth silicon carbide region 14 includes a fifth semiconductor region14 e and a sixth semiconductor region 14 f. The first semiconductorregion 12 a is between the fifth semiconductor region 14 e and the firstinsulating member 41 in the first direction (the X-axis direction). Thesecond semiconductor region 12 b is between the first insulating member41 and the sixth semiconductor region 14 f in the first direction (theX-axis direction). The fourth silicon carbide region 14 is electricallyconnected to the third electrode 53. The fourth silicon carbide region14 is electrically connected to the third silicon carbide region 13. Forexample, the potential of the third silicon carbide region 13 isstabilized by electrically connecting the third silicon carbide region13 to the third electrode 53 via the fourth silicon carbide region 14.

In the example as shown in FIG. 1, the silicon carbide member 10 furtherincludes a fifth silicon carbide region 15. The fifth silicon carbideregion 15 is between the second electrode 52 and the first siliconcarbide region 11. The fifth silicon carbide region 15 may be, forexample, a silicon carbide substrate.

For example, the fifth silicon carbide region 15 is provided on thesecond electrode 52. The first silicon carbide region 11 is provided onthe fifth silicon carbide region 15. The third semiconductor region 13 cis provided on a portion of the first silicon carbide region 11. Thefirst semiconductor region 12 a is provided on the third semiconductorregion 13 c. The fourth semiconductor region 13 d is provided on anotherportion of the first silicon carbide region 11. The second semiconductorregion 12 b is provided on the fourth semiconductor region 13 d. Thefirst partial region 11 a, the second partial region 11 b, and the thirdpartial region 11 c of the first silicon carbide region 11 correspondto, for example, a drift layer region. The fourth partial region 11 dcorresponds to a JFET region.

As shown in FIG. 1, the first insulating region 41 a includes a firstsurface F1. The first surface F1 faces the first semiconductor region 12a and the third semiconductor region 13 c. The first surface F1 isoblique to the (0001) plane of the silicon carbide member 10. Forexample, the first direction (the X-axis direction) is along the (0001)plane.

For example, high mobility is obtained by setting the first surface F1to be oblique to the (0001) plane of the silicon carbide member 10. Inthe semiconductor device 110, a channel is formed at the vicinity of theoblique first insulating region 41 a. Current flows in the obliquedirection.

For example, there is a first reference example in which the channel isparallel to the X-Y plane. The mobility is low in the first referenceexample. A higher mobility than the first reference example is obtainedin the embodiment by setting the first surface F1 to be oblique to the(0001) plane of the silicon carbide member 10.

On the other hand, a second reference example may be considered in whichthe fourth partial region 11 d is not provided between the thirdsemiconductor region 13 c and the fourth semiconductor region 13 d andthe channel is oblique to the (0001) plane. In the second referenceexample, for example, the electric field easily concentrates at thethird insulating region 41 c.

Conversely, in the embodiment, the fourth partial region 11 d isprovided between the third semiconductor region 13 c and the fourthsemiconductor region 13 d. Thereby, compared to the second referenceexample, the concentration of the electric field can be suppressed inthe embodiment.

According to the embodiment, high mobility is obtained. For example, alow on-resistance is obtained. For example, the concentration of theelectric field can be suppressed, and a high breakdown voltage isobtained. For example, high reliability is obtained. According to theembodiment, a semiconductor device can be provided in which thecharacteristics can be improved.

In the embodiment, the angle between the first surface F1 and the (0001)plane is, for example, not less than 5 degrees and not more than 85degrees. This angle may be not less than 20 degrees and not more than 70degrees. This angle may be not less than 20 degrees and not more than 45degrees. This angle may be not less than 45 degrees and not more than 70degrees.

For example, the first surface F1 may be along the (0-33-8) plane of thesilicon carbide member 10. For example, the first surface F1 may bealong the (0-3-38) plane of the silicon carbide member 10.

In the notation of crystal orientations and planes of thisspecification, the “-” corresponds to a “bar” of the numeral after the“-”.

As shown in FIG. 1, the second insulating region 41 b includes a secondsurface F2. The second surface F2 faces the second semiconductor region12 b and the fourth semiconductor region 13 d. In the embodiment, thesecond surface F2 may be oblique to the (0001) plane of the siliconcarbide member 10. High mobility is obtained by such an oblique secondsurface F2.

In the embodiment, the angle between the second surface F2 and the(0001) plane is, for example, not less than 5 degrees and not more than85 degrees. This angle may be not less than 20 degrees and not more than70 degrees.

For example, the second surface F2 may be along the (0-33-8) plane ofthe silicon carbide member 10. The second surface F2 may be along the(0-3-38) plane of the silicon carbide member 10. In one example, thefirst surface F1 is along the (0-33-8) plane, and the second surface F2is along the (03-3-8) plane. In one example, the first surface F1 isalong the (03-38) plane, and the second surface F2 is along the (0-338)plane.

For example, the silicon carbide member 10 includes 4H—SiC. For example,the upper surface of the silicon carbide member 10 is a Si-surface. Forexample, the upper surface of the silicon carbide member 10 is aC-surface. For example, the Si-surface corresponds to the (0001) plane.For example, the C-surface corresponds to the (000-1) plane.

As shown in FIG. 1, the silicon carbide member 10 includes a firstcounter surface FC1. The first counter surface FC1 faces the secondelectrode 52. For example, the first counter surface FC1 is along the(0001) plane.

For example, the second silicon carbide region 12 includes a secondcounter surface FC2 facing the third electrode 53. For example, thesecond counter surface FC2 is along the (0001) plane.

For example, the first insulating member 41 includes silicon and oxygen.For example, the first insulating member 41 includes SiO₂. The firstinsulating member 41 may include silicon, oxygen, and nitrogen.

For example, the surface density of the Si atoms of SiO₂ is about2.2×10¹⁴ cm⁻². On the other hand, the surface density of the Si atoms ofa Si-surface of SiC is about 12×10¹⁴ cm⁻², and is much different fromthat of SiO₂. The surface density of the Si atoms of the a-plane of SiCis about 7.4×10¹⁴ cm⁻². The surface density of the Si atoms of them-plane of SiC is about 6.4×10¹⁴ cm⁻². The surface density of the Siatoms of the (0-33-8) plane of SiC is about 1.7×10¹⁴ cm⁻². The surfacedensity of the Si atoms of the (03-38) plane of SiC is about 0.57×10¹⁴cm⁻². By setting the first surface F1 (and the second surface F2) to beoblique to the (0001) plane, the difference between the surface densityof the Si atoms of the surface of the silicon carbide member 10 and thesurface density of the Si atoms of SiO₂ can be small. For example, thedensity of unbonded groups of Si can be reduced by reducing the surfacedensity difference. It is considered that the mobility can be improvedby setting the first surface F1 (and the second surface F2) to beoblique to the (0001) plane based on the reduction of the density ofunbonded groups of Si.

As shown in FIG. 1, the first silicon carbide region 11 may furtherinclude a fifth partial region 11 e. The fifth partial region 11 e isbetween the third semiconductor region 13 c and the third insulatingregion 41 c in the first direction (the X-axis direction). By providingthe fifth partial region 11 e, for example, the local concentration ofthe electric field at the corner portion of the bottom portion of thefirst insulating member 41 can be suppressed. For example, a stablebreakdown voltage is obtained. For example, high reliability isobtained.

For example, at least a portion of the fifth partial region 11 e may beprovided between the third semiconductor region 13 c and the firstelectrode 51 in the first direction (the X-axis direction). Theconcentration of the electric field can be further suppressed thereby.

As shown in FIG. 1, the first silicon carbide region 11 may furtherinclude a sixth partial region 11 f. The sixth partial region 11 f isbetween the third insulating region 41 c and the fourth semiconductorregion 13 d in the first direction (the X-axis direction). By providingthe sixth partial region 11 f, for example, the local concentration ofthe electric field at the corner portion of the bottom portion of thefirst insulating member 41 can be suppressed. For example, a stablebreakdown voltage is obtained. For example, high reliability isobtained.

For example, at least a portion of the sixth partial region 11 f may beprovided between the first electrode 51 and the fourth semiconductorregion 13 d in the first direction (the X-axis direction). Theconcentration of the electric field can be further suppressed thereby.

For example, the semiconductor device 110 can be formed by forming arecess by removing a portion of the silicon carbide member used to formthe silicon carbide member 10, and by filling the first insulatingmember 41 and the first electrode 51 into the recess. The first surfaceF1 and the second surface F2 such as those described above are obtainedby etching the recess to have oblique side surfaces. For example, theoblique first and second surfaces F1 and F2 are easily obtained by usingan etchant such as chlorine, etc. The semiconductor device 110 accordingto the embodiment can be manufactured easily.

The impurity concentration (or the carrier concentration) of the firstconductivity type in the second silicon carbide region 12 is, forexample, greater than the impurity concentration (or the carrierconcentration) of the first conductivity type in the first siliconcarbide region 11. For example, the first silicon carbide region 11 isan n-layer, and the second silicon carbide region 12 is an n⁺-layer. Forexample, the impurity concentration of the first conductivity type inthe first silicon carbide region 11 is not less than 5×10¹⁵ cm⁻³ and notmore than 5×10¹⁶ cm⁻³. For example, the impurity concentration of thefirst conductivity type in the second silicon carbide region 12 is notless than 1×10¹⁹ cm⁻³ and not more than 1×10²⁰ cm⁻³.

The impurity concentration (or the carrier concentration) of the firstconductivity type in the fifth silicon carbide region 15 is, forexample, greater than the impurity concentration (or the carrierconcentration) of the first conductivity type in the first siliconcarbide region 11. For example, the fifth silicon carbide region 15 isan n⁺-layer. For example, the impurity concentration of the firstconductivity type in the fifth silicon carbide region 15 is not lessthan 5×10¹⁸ cm⁻³ and not more than 1×10¹⁹ cm⁻³.

The impurity concentration (or the carrier concentration) of the secondconductivity type in the fourth silicon carbide region 14 is, forexample, greater than the impurity concentration (or the carrierconcentration) of the second conductivity type in the third siliconcarbide region 13. For example, the third silicon carbide region 13 is ap-layer, and the fourth silicon carbide region 14 is a p⁺-layer. Forexample, the impurity concentration of the second conductivity type inthe third silicon carbide region 13 is not less than 5×10¹⁵ cm⁻³ and notmore than 5×10¹⁸ cm⁻³. For example, the impurity concentration of thesecond conductivity type in the fourth silicon carbide region 14 is notless than 1×10¹⁹ cm⁻³ and not more than 1×10²⁰ cm⁻³.

As shown in FIG. 1, the semiconductor device 110 may include a secondinsulating member 42. The second insulating member 42 is providedbetween the first electrode 51 and the third electrode 53. The secondinsulating member 42 electrically insulates the first electrode 51 andthe third electrode 53.

FIG. 2 is a schematic cross-sectional view illustrating thesemiconductor device according to the embodiment.

As shown in FIG. 2, the second silicon carbide region 12 includes thesecond counter surface FC2 facing the third electrode 53. For example,the second counter surface FC2 corresponds to the upper surface of thesilicon carbide member 10. The third insulating region 41 c includes athird counter surface FC3 facing the fourth partial region 11 d. Thethird counter surface FC3 corresponds to the bottom surface of thebottom portion of the first insulating member 41.

As shown in FIG. 2, the distance in the second direction (the Z-axisdirection) between the position in the second direction (e.g., theZ-axis direction) of the second counter surface FC2 and the position inthe second direction (the Z-axis direction) of the third counter surfaceFC3 is taken as a first distance d1. The first distance d1 correspondsto the depth of the recess in which the first insulating member 41 isprovided. In the embodiment, the first distance d1 is, for example, notless than 0.2 μm and not more than 0.8 μm.

As shown in FIG. 2, the distance in the second direction (the Z-axisdirection) between the position in the second direction (the Z-axisdirection) of the third counter surface FC3 and the position in thesecond direction (the Z-axis direction) of a boundary BD1 between thethird semiconductor region 13 c and the first partial region 11 a istaken as a second distance d2. The second distance d2 corresponds to thedifference between the depth of the bottom portion of the thirdsemiconductor region 13 c and the depth of the bottom portion of thethird insulating region 41 c. In the embodiment, the second distance d2is, for example, not less than 0.05 μm and not more than 0.8 μm.

As shown in FIG. 2, the thickness of the first insulating region 41 aalong a direction perpendicular to the first surface F1 is taken as athickness t1. In the embodiment, the thickness t1 is, for example, notless than 10 nm and not more than 100 nm.

As shown in FIG. 2, the thickness of the third insulating region 41 calong the second direction (the Z-axis direction) is taken as athickness t3. In the embodiment, the thickness t3 is, for example, notless than 10 nm and not more than 100 nm. When the thickness t3 is lessthan the thickness t1, the second distance d2 can be reduced, and theresistance of the element can be reduced.

In the embodiment, the first electrode 51 includes, for example,polysilicon. At least one of the second electrode 52 or the thirdelectrode 53 includes, for example, at least one selected from the groupconsisting of Ni, Mo, W, V, Co, Ti, Au, Cu, and Al. At least one of thesecond electrode 52 or the third electrode 53 may include a silicide.

According to the embodiments, a semiconductor device can be provided inwhich the characteristics can be improved.

Hereinabove, exemplary embodiments of the invention are described withreference to specific examples. However, the embodiments of theinvention are not limited to these specific examples. For example, oneskilled in the art may similarly practice the invention by appropriatelyselecting specific configurations of components included insemiconductor devices such as silicon carbide members, silicon carbideregions, electrodes, insulating members, etc., from known art. Suchpractice is included in the scope of the invention to the extent thatsimilar effects thereto are obtained.

Further, any two or more components of the specific examples may becombined within the extent of technical feasibility and are included inthe scope of the invention to the extent that the purport of theinvention is included.

Moreover, all semiconductor devices practicable by an appropriate designmodification by one skilled in the art based on the semiconductordevices described above as embodiments of the invention also are withinthe scope of the invention to the extent that the spirit of theinvention is included.

Various other variations and modifications can be conceived by thoseskilled in the art within the spirit of the invention, and it isunderstood that such variations and modifications are also encompassedwithin the scope of the invention.

While certain embodiments have been described, these embodiments havebeen presented by way of example only, and are not intended to limit thescope of the inventions. Indeed, the novel embodiments described hereinmay be embodied in a variety of other forms; furthermore, variousomissions, substitutions and changes in the form of the embodimentsdescribed herein may be made without departing from the spirit of theinventions. The accompanying claims and their equivalents are intendedto cover such forms or modifications as would fall within the scope andspirit of the invention.

What is claimed is:
 1. A semiconductor device, comprising: a siliconcarbide member including a first silicon carbide region, a secondsilicon carbide region, and a third silicon carbide region; a firstelectrode; a second electrode; a third electrode; and a first insulatingmember, the first silicon carbide region including a first partialregion, a second partial region, a third partial region, and a fourthpartial region, the first silicon carbide region being of a firstconductivity type, a direction from the first partial region toward thesecond partial region being along a first direction, the third partialregion being between the first partial region and the second partialregion, the fourth partial region being between the third partial regionand the first electrode in a second direction crossing the firstdirection, the second silicon carbide region including a firstsemiconductor region and a second semiconductor region, the secondsilicon carbide region being of the first conductivity type, a directionfrom the first partial region toward the first semiconductor region anda direction from the second partial region toward the secondsemiconductor region being along the second direction, the third siliconcarbide region including a third semiconductor region and a fourthsemiconductor region, the third silicon carbide region being of a secondconductivity type, the third semiconductor region being between thefirst partial region and the first semiconductor region in the seconddirection, the fourth semiconductor region being between the secondpartial region and the second semiconductor region in the seconddirection, the fourth partial region being between the thirdsemiconductor region and the fourth semiconductor region in the firstdirection, at least a portion of the first electrode being between thefirst semiconductor region and the second semiconductor region in thefirst direction and between the third semiconductor region and thefourth semiconductor region in the first direction, the first insulatingmember including a first insulating region, a second insulating region,and a third insulating region, the first insulating region being betweenthe first semiconductor region and the first electrode and between thethird semiconductor region and the first electrode, the secondinsulating region being between the first electrode and the secondsemiconductor region and between the first electrode and the fourthsemiconductor region, the third insulating region being between thefourth partial region and the first electrode, the second electrodebeing electrically connected to the first silicon carbide region, thethird partial region and the fourth partial region being between thesecond electrode and the first electrode, the third electrode beingelectrically connected to the second silicon carbide region, the firstinsulating region including a first surface facing the first and thirdsemiconductor regions, the first surface being oblique to a (0001) planeof the silicon carbide member, the first direction being along the(0001) plane.
 2. The device according to claim 1, wherein an anglebetween the first surface and the (0001) plane is not less than 5degrees and not more than 85 degrees.
 3. The device according to claim1, wherein the first surface is along a (0-33-8) plane of the siliconcarbide member.
 4. The device according to claim 1, wherein the firstsurface is along a (0-3-38) plane of the silicon carbide member.
 5. Thedevice according to claim 1, wherein the second insulating regionincludes a second surface facing the second and fourth semiconductorregions, and the second surface is oblique to a (0001) plane of thesilicon carbide member.
 6. The device according to claim 5, wherein anangle between the second surface and the (0001) plane is not less than 5degrees and not more than 85 degrees.
 7. The device according to claim5, wherein the second surface is along a (0-33-8) plane of the siliconcarbide member.
 8. The device according to claim 5, wherein the secondsurface is along a (0-3-38) plane of the silicon carbide member.
 9. Thedevice according to claim 1, wherein the silicon carbide member includesa first counter surface facing the second electrode, and the firstcounter surface is along the (0001) plane.
 10. The device according toclaim 1, wherein the silicon carbide member includes 4H—SiC.
 11. Thedevice according to claim 1, wherein the first silicon carbide regionfurther includes a fifth partial region, and the fifth partial region isbetween the third semiconductor region and the third insulating regionin the first direction.
 12. The device according to claim 11, wherein atleast a portion of the fifth partial region is between the thirdsemiconductor region and the first electrode in the first direction. 13.The device according to claim 11, wherein the first silicon carbideregion further includes a sixth partial region, and the sixth partialregion is between the third insulating region and the fourthsemiconductor region in the first direction.
 14. The device according toclaim 13, wherein at least a portion of the sixth partial region isbetween the first electrode and the fourth semiconductor region in thefirst direction.
 15. The device according to claim 1, wherein thesilicon carbide member further includes a fourth silicon carbide regionof the second conductivity type, the fourth silicon carbide regionincludes a fifth semiconductor region and a sixth semiconductor region,the first semiconductor region is between the fifth semiconductor regionand the first insulating member in the first direction, the secondsemiconductor region is between the first insulating member and thesixth semiconductor region in the first direction, and the fourthsilicon carbide region is electrically connected to the third electrode.16. The device according to claim 1, wherein the second silicon carbideregion includes a second counter surface facing the third electrode, thethird insulating region includes a third counter surface facing thefourth partial region, and a first distance in the second directionbetween a position in the second direction of the second counter surfaceand a position in the second direction of the third counter surface isnot less than 0.2 μm and not more than 0.8 μm.
 17. The device accordingto claim 1, wherein the third insulating region includes a third countersurface facing the fourth partial region, and a second distance in thesecond direction between a position in the second direction of the thirdcounter surface and a position in the second direction of a boundarybetween the third semiconductor region and the first partial region isnot less than 0.05 μm and not more than 0.8 μm.
 18. The device accordingto claim 1, wherein a thickness of the first insulating region along adirection perpendicular to the first surface is not less than 10 nm andnot more than 100 nm.
 19. The device according to claim 1, wherein athickness of the third insulating region along the second direction isnot less than 10 nm and not more than 100 nm.
 20. The device accordingto claim 1, wherein the first insulating member includes silicon andoxygen.